TSMC is reportedly weighing a 20% price increase for its CoWoS advanced packaging, a move that would affect Nvidia and other chip designers whose AI accelerators depend on the technology. CoWoS places logic dies and high-bandwidth memory stacks in a single package, and it is the packaging step that gives AI accelerators the data bandwidth their workloads require. The reported increase comes as Nvidia's Blackwell and the upcoming Rubin and Rubin Ultra generations push integration further, straining packaging capacity and the supply chain around it.
Nvidia's Blackwell already combines two large GPU dies with eight HBM3E stacks, and the Rubin and Rubin Ultra parts are expected to demand tighter integration still. Testing has emerged as a separate bottleneck: Blackwell reportedly takes three to four times longer to test than Nvidia's previous-generation Hopper, while Rubin could take as much as seven times longer. Longer test cycles keep equipment tied up for extended periods, making it harder to raise output as demand grows. Server CPUs and custom ASICs also require advanced packaging, adding to the competition for capacity.
Equipment lead times have reportedly stretched from three to six months to as long as eight months. TSMC has reportedly placed this year's equipment orders at existing prices rather than negotiating discounts or additional features, a departure from its usual practice of using its purchasing power to secure better terms. Getting tools on time now appears to matter more to the company than getting them cheaply, according to the report.
The pressure follows a September report that TSMC's projected semiconductor equipment requirements had almost doubled in six months as the company expanded production for AI demand. Cliff Hou, deputy co-COO at TSMC, said that by July the company's expected equipment needs had reached 1.9 times its original estimate as AI demand accelerated. Hou said the company had never seen demand increase that much, or change at that frequency, compared with the pattern 30 years ago.
TSMC is also working to broaden its packaging supply chain. Earlier this month, GlobalFoundries agreed to produce silicon interposers for TSMC's CoWoS in the U.S. under a five-year contract worth $2 billion, with production expected to ramp in the first half of 2028. Interposers are only one part of the packaging flow, so the agreement alone will not eliminate shortages.
Costs are rising beyond packaging as well. TSMC is reportedly considering broader price increases for 2027, with wafer prices on advanced process technologies expected to rise 5% to 10%. Customers on 2nm and 3nm-class nodes could face the steepest hikes, while those seeking capacity beyond their original allocations may pay additional premiums that could push some costs up by as much as 25%. Industry estimates cited by TrendForce put TSMC's monthly capacity at over 106,000 wafers in 2026, with a target of 227,000 wafers in 2027.
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